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  sn74cbt6800a 10-bit fet bus switch with precharged outputs scds005n ? march 1993 ? revised march 2001 1 post office box 655303 ? dallas, texas 75265 5- ? switch connection between two ports ttl-compatible input levels outputs are precharged by bias voltage to minimize signal distortion during live insertion description the sn74cbt6800a provides ten bits of high-speed ttl-compatible bus switching. the low on-state resistance of the switch allows bidirectional connections to be made while adding near-zero propagation delay. the device also precharges the b port to a user-selectable bias voltage (biasv) to minimize live-insertion noise. the sn74cbt6800a is organized as one 10-bit switch with a single enable (on ) input. when on is low, the switch is on, and port a is connected to port b. when on is high, the switch between port a and port b is open. when on is high or v cc is 0 v, b port is precharged to biasv through the equivalent of a 10-k ? resistor. ordering information t a package ? orderable part number top-side marking soic dw tube sn74cbt6800adw cbt6800a soic ? dw tape and reel sn74cbt6800adwr cbt6800a 40 cto85 c ssop ? db tape and reel sn74cbt6800adbr ct6800a ? 40 c to 85 c ssop (qsop) ? dbq tape and reel SN74CBT6800ADBQR cbt6800a tssop ? pw tape and reel sn74cbt6800apwr ct6800a tvsop ? dgv tape and reel sn74cbt6800adgvr ct6800a ? package drawings, standard packing quantities, thermal data, symbolization, and pcb design guidelines are available at www.ti.com/sc/package. function table input on function l a port = b port h a port = z b port = biasv db, dbq, dgv, dw, or pw package (top view) on a1 a2 a3 a4 a5 a6 a7 a8 a9 a10 gnd v cc b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 biasv 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 production data information is current as of publication date. products conform to specifications per the terms of texas instruments standard warranty. production processing does not necessarily include testing of all parameters. copyright ? 2001, texas instruments incorporated please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
sn74cbt6800a 10-bit fet bus switch with precharged outputs scds005n ? march 1993 ? revised march 2001 2 post office box 655303 ? dallas, texas 75265 logic diagram (positive logic) on a1 a10 b1 biasv b10 2 11 1 13 23 14 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) ? supply voltage range, v cc ? 0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . bias voltage range, biasv ? 0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input voltage range, v i (see note 1) ? 0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous channel current 128 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input clamp current, i ik (v i < 0) ? 50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . package thermal impedance, ja (see note 2): db package 63 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . dbq package 61 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . dgv package 86 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . dw package 46 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . pw package 88 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range, t stg ? 65 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ? stresses beyond those listed under ? absolute maximum ratings ? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ? recommended operating conditions ? is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. notes: 1. the input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observe d. 2. the package thermal impedance is calculated in accordance with jesd 51-7. recommended operating conditions (see note 3) min max unit v cc supply voltage 4 5.5 v biasv supply voltage 1.3 v cc v v ih high-level control input voltage 2 v v il low-level control input voltage 0.8 v t a operating free-air temperature ? 40 85 c note 3: all unused control inputs of the device must be held at v cc or gnd to ensure proper device operation. refer to the ti application report, implications of slow or floating cmos inputs , literature number scba004.
sn74cbt6800a 10-bit fet bus switch with precharged outputs scds005n ? march 1993 ? revised march 2001 3 post office box 655303 ? dallas, texas 75265 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) parameter test conditions min typ ? max unit v ik v cc = 4.5 v, i i = ? 18 ma ? 1.2 v i i v cc = 5.5 v, v i = 5.5 v or gnd 5 a i o v cc = 4.5 v, biasv = 2.4 v, v o = 0 0.25 ma i cc v cc = 5.5 v, i o = 0, v i = v cc or gnd 50 a ? i cc ? control inputs v cc = 5.5 v, one input at 3.4 v, other inputs at v cc or gnd 2.5 ma c i control inputs v i = 3 v or 0 3.5 pf c o(off) v o = 3 v or 0, switch off 4.5 pf v cc = 4 v, typ at v cc = 4 v v i = 2.4 v, i i = 15 ma 11 20 r on v i =0 i i = 64 ma 3 7 ? on v cc = 4.5 v v i = 0 i i = 30 ma 3 7 v i = 2.4 v, i i = 15 ma 6 15 ? all typical values are at v cc = 5 v (unless otherwise noted), t a = 25 c. ? this is the increase in supply current for each input that is at the specified ttl voltage level rather than v cc or gnd. measured by the voltage drop between the a and b terminals at the indicated current through the switch. on-state resistance is determined by the lower of the voltages of the two (a or b) terminals. switching characteristics over recommended operating free-air temperature range, c l = 50 pf (unless otherwise noted) (see figure 1) parameter test conditions from (input) to (output) v cc = 4 v v cc = 5 v 0.5 v unit conditions (input) (output) min max min max t pd ? a or b b or a 0.35 0.25 ns t pzh biasv = gnd on aorb 6 2 5.1 ns t pzl biasv = 3 v on a or b 6 2 5.6 ns t phz biasv = gnd on aorb 5.5 1 5 ns t plz biasv = 3 v on a or b 5.5 2 5.9 ns ? the propagation delay is the calculated rc time constant of the typical on-state resistance of the switch and the specified loa d capacitance, when driven by an ideal voltage source (zero output impedance).
sn74cbt6800a 10-bit fet bus switch with precharged outputs scds005n ? march 1993 ? revised march 2001 4 post office box 655303 ? dallas, texas 75265 parameter measurement information v oh v ol from output under test c l = 50 pf (see note a) load circuit s1 7 v open gnd 500 ? 500 ? t plh t phl output control (low-level enabling) output waveform 1 s1 at 7 v (see note b) output waveform 2 s1 at open (see note b) t pzl t pzh t plz t phz 3 v 0 v v oh v ol 0 v v ol + 0.3 v v oh ? 0.3 v 0 v input 3 v 3.5 v voltage waveforms propagation delay times voltage waveforms enable and disable times output t pd t plz /t pzl t phz /t pzh open 7 v open test s1 notes: a. c l includes probe and jig capacitance. b. waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. c. all input pulses are supplied by generators having the following characteristics: prr 10 mhz, z o = 50 ? , t r 2.5 ns, t f 2.5 ns. d. the outputs are measured one at a time with one transition per measurement. e. t plz and t phz are the same as t dis . f. t pzl and t pzh are the same as t en . g. t plh and t phl are the same as t pd . 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v figure 1. load circuit and voltage waveforms
package option addendum www.ti.com 9-aug-2016 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples SN74CBT6800ADBQR active ssop dbq 24 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 85 cbt6800a sn74cbt6800adw active soic dw 24 25 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 cbt6800a sn74cbt6800adwr active soic dw 24 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 cbt6800a sn74cbt6800apwr active tssop pw 24 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 ct6800a sn74cbt6800apwrg4 active tssop pw 24 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 ct6800a (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device.
package option addendum www.ti.com 9-aug-2016 addendum-page 2 (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis.
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant SN74CBT6800ADBQR ssop dbq 24 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 q1 sn74cbt6800adwr soic dw 24 2000 330.0 24.4 10.75 15.7 2.7 12.0 24.0 q1 sn74cbt6800apwr tssop pw 24 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.0 q1 package materials information www.ti.com 22-jan-2015 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) SN74CBT6800ADBQR ssop dbq 24 2500 367.0 367.0 38.0 sn74cbt6800adwr soic dw 24 2000 367.0 367.0 45.0 sn74cbt6800apwr tssop pw 24 2000 367.0 367.0 38.0 package materials information www.ti.com 22-jan-2015 pack materials-page 2





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